Ramp voltage wave generating circuits

ABSTRACT

In a ramp voltage wave generating circuit, there are provided a Miller&#39;&#39;s integrator including an amplifier, a capacitor connected in parallel with the amplifier and a resistor with one terminal connected to the input side of the amplifier; a source of constant current current connected to the other terminal of the resistor; first means for maintaining at a constant value the reference potential at the output terminal of the integrator in the absence of an input signal; second means for maintaining at the constant value the reference potential in the presence of the input signal; and a three terminal active element with two terminals connected to the second means and to the source of the input signal and the remaining terminal connected to a source of reference potential.

United States Patent 1 Matuoka 51 Jan. 2, 1973 [54] RAMP VOLTAGE WAVE GENERATING CIRCUITS [75] Inventor: Hideo Matuoka, Tokyo, Japan [73] Assignee: lwatsu Electric Company, Ltd.,

' Tokyo, Japan [22] Filed: May 4, 1971 [21] Appl. No.: 140,130

[30] Foreign Application Priority Data 3,405,286 10/1968 Mudie ..307/228X 3,408,580 10/1968 Moriyasu ..307/228X 3,435,257 3/1969 Lawrie,.lr. ..307/289 [57] ABSTRACT In a ramp voltage wave generating circuit, there are provided a Millers integrator including an amplifier, a capacitor connected in parallel with the amplifier and May 7, 1970 Japan ..45/38428 a resistor with one terminal connected to the input side of the amplifier; a source of constant current cur- [52] US. Cl. ..307/228, 328/128, 328/183, rem connected to the other terminal of the resistor; 328/185 first means for maintaining at a constant value the [51] 111i. Cl. ..H03k 4/08 reference potential at the output terminal of the [58] Field of Search ..307/228, 32 8/127,l28, 183, tegratol. in the absence of an input signal; Second 328/185 means for maintaining at the constant value the reference potential in the presence of the input signal; [56] References Cited and a three terminal active element with two terminals UNITED STATES PATENTS connected to the second means and to the source of the input signal and the remaining terminal connected 3,339,088 8/1967 Dillard ..328/185 X to a source of reference potential. 3,138,764 6/1964 Dalton et al. ..328/128 UX 3,569,998 3/1971 Eguchi ..307/228 3 Claims, 4 Drawing Figures ii 102 $2112 131 H L 1113 D 111 1 I1 12 PATENTEDJAK 2 m5 3.708.692 SHEET 1 OF 2 rm v I F AMPL NV INVENTOR HI DEO MATUOKA EQMWQ A A ORNEY PATENTED JAN 2 3 708 6 92 sum 2 0r 2 1 INVENTOR HIDEO MATUOKA BY W'v -A R'WSL I W J 6%ENEY RAMP VOLTAGE WAVE GENERATING CIRCUITS BACKGROUND OF THE INVENTION This invention relates to an improved circuit for generating a ramp voltage wave.

In order to have a better understanding of the invention, examples of prior art circuits will first be described. The prior circuit shown in FIG. 1 for generating a ramp voltage wave utilizes a Millers integrator and comprises a source of input signal Ei, diodes D, and D,, a resistor R, connected between diode D, and the source Ei, an amplifier A, having a gain A,, a capacitor C, connected between the input and output of the amplifier, a DC source Eb, for providing a reference potential for determining the in tegrating operation at the output terminal T, of amplifier A, and a DC source Eb, connected to the input terminal T, of the amplifier.

The circuit shown in FIG. 1 operates as follows Assuming that the input level of the amplifier A, in the absence of a step input from the source of input signal Ei is at zero potential, the current I, flowing through resistor R, from DC source Eb, flows into the source of input signal Ei via diode D, and resistor R,. Denoting the terminal voltages across diodes D, and D, by E and E,,,, respectively, the reference potential at the output terminal T, of amplifier A, before initiating the integrating operation will be expressed by E E I Upon application of the step input from the source of input signal Ei, diodes D, and D, which have been conducting are rendered OFF whereby the current I, through resistor R, flows into capacitor C,. Thus, a ramp voltage wave of -a predetermined inclination is generated at the output terminal T, of the amplifier A, following initiation of the integrating operation.

When the inclination of the ramp voltage wave is varied by varying the value of resistor R, or DC source Eb, so as tovary current 1,, flowing through resistor R,, such an adjustment causes the voltage E across diode D, to vary so that it is impossible to maintain at a constant value the reference potential at the output terminal T, at instant when the ramp voltage wave begins I start.

FIG. 2 shows another prior art ramp voltage wave generating circuit designed to eliminate the defect described above, in which components identical to or functioning similarly as those shown in FIG. 1 are designated by the same reference symbols. The circuit shown in FIG. 2 comprises a comparator circuit COM including two PNP transistors TR, and TR, with their emitter electrodes coupled together. These emitter electrodes are connected to a DC bias source Eb through a resistor R whereas the base electrode of transistor TR, is connected to a source of reference potential E Comparator circuit COM corresponds to the DC source Eb, shown in FIG. 1. A biasing diode D, is connected to the collector electrode of transistor TR,.

With this circuit, it is possible to maintain the reference potential at the output terminal T, at the voltage of the source of reference potential Ec connected to the base electrode of transistor TR, when the ramp wave is not being provided. Assuming a voltage amplification factor of A, of the collector electrode of transistor TR, with reference to the base electrode of transistor TR, it is possible to decrease to about l/A, variations in the reference potential at the output terminal which is caused by the variation in the voltage drop E acrossdiode D, when the rampe wave is initiated. With this arrangement, however, where the voltage amplification factor A, is increased, or where the value of capacitor C, is decreased for the purpose of producing a high speed ramp voltage wave, the tendency of producing an oscillation is increased thus causing unstable operation. In an integrator comprising a conventional transistor the output is about 10 volts so that the voltage drop of a silicon diode usually amounting to 0.6 volt can not be neglected. Furthermore, in the prior art Millers integrator when the capacitor C, is selected to have a value of about 50 PF for producing a high speed sweeping output, the construction of the circuit shown in FIG. 2 becomes complicated.

SUMMARY OF THE INVENTION It is an object of this invention to provide a new and improved ramp voltage wave generating circuit which can eliminate the defects of the prior art circuits.

More specific object of this invention is to provide an improved ramp voltage wave generating circuit which can maintain at a constant value the reference voltage appearing at the output terminal when the ramp voltage wave begins to start.

Another object of this invention is to provide a ramp voltage wave generating circuit having little tendency of creating an oscillation so that it is suitable for effecting high speed sweeping.

According to this invention there is provided a ramp voltage wave generating circuit comprising a Millers integrator including an amplifier, a capacitor connected in parallel with the amplifier, and a resistor with one terminal connected to the input side of the amplifier a source of constant current connected to the other terminal of the resistor first means for maintaining at a constant value the reference potential at the output terminal of the integrator in the absence of an input signal second means formaintaining at the constant value the reference potential of the output terminal of the integrator in the presence of the input signal and a three terminal active element with two terminals connected to the second means and to the source of the input signal respectively and the remaining terminal connected to a source of reference potential.

BRIEF DESCRIPTION OF THE DRAWINGS In the accompanying drawings FIGS. 1 and 2 show two examples of prior art ramp voltage wave generating circuits FIG. 3 shows a connection diagram of one example of a ramp voltage wave generating circuit embodying DESCRIPTION OF THE PREFERRED EMBODIMENT The preferred embodiment of the invention shown in FIG. 3 comprises a Zener diode ZD corresponding to DC source Ebl shown in FIG. 1, a source of constant current Ics for producing constant current output Ic, a transistor TR a diode D, and a source of direct current Eb Another elements are identical to those shown in FIG. 1.

In the absence of a step input from the source of input signal Ei, both diodes D, and D and transistor TR, are conductive so that current flows from the source of constant current Ics to the source of input signal Ei via resistor R diode D,, transistor TR and resistor R,. Further a current (Ic I flows from source of constant current Ics to the source of input signal Ei via transistor TR, and resistor R,. As a result, a constant current (I Ic I Ic always flows through transistor TR independently of current 1,. Thus, the emitter voltage ED of transistor TR is constant so that the reference potential at the output terminal T at the beginning of the ramp voltage wave is maintained at a constant value equal to (-ED, ED, Eb, Upon application of a step input from the source of input signal Ei transistor TR is rendered OFF whereby the current (Ic I flows through diode D and current I, flows through capacitor C, thus producing a ramp voltage wave which is determined by current I, and capacitor C1.

In FIG. 4 which shows the details of the connections of the circuit shown in FIG. 3, dotted line blocks Ics and A, show the details of constant current source Ics and amplifier A,. Amplifier A, comprises a field effect transistor TR with its drain electrode connected to source Eb and a NPN type transistor TR with its emitter electrode grounded. The source electrode of field effect transistor TR, and the base electrode of transistor TR are interconnected through a base resistor R The base electrode of transistor TR is also connected to a source Eb through a resistor R The constant current source Ics comprises a PNP type transistor TR a NPN type transistor'TR sources Eb, and Eb connected to the base electrodes of transistors TR and TR,,, respectively, and a resistor R connected between the emitter electrode of transistor TR, and a DC source Eb The anode electrode of Zener diode ZD is connected to a biasing diode D and a resistor R which is connected to a source Eb,. The output terminal of amplifier A, is connected to a source Eb, through a resistor R Of course, the circuit shown in FIG. 4 operates in the same manner as that shown in FIG. 3. Where the transistors used in the circuit of FIG. 4 are of the silicon type, the emitter'base voltage of PNP type transistor TR, and the emitter-base voltage of NPN type transistors are equal to about 0.6 volt, respectively, so that current Ic flowing through resistor R, and transistor TR, is expressed by [C [Eb (Eb,

0.6)/R, whereas current I, flowing through resistor R by I [(Eb, 0.6) E,/R where E, represents the gate voltage of the field effect transistor TR As above described with the novel ramp voltage wave generating circuit it is possible to maintain at a precisely constant value the reference potential appearing at the output terminal T at the commencement of the ramp voltage wave. Moreover as the circuit has little tendency for creating oscillation, the novel circuit is suitable'for high speed sweeping so that it is applicable with good results to a high speed sweeping circuit of an oscilloscope or a delay circuit utilizing the ram volt ge wave.

hile the invention has been shown and described in terms of a preferred embodiment it is to be understood that many changes and modifications may be made without departing from the true spirit and scope of the invention as defined in the appended claims.

What is claimed is l. A ramp voltage wave generating circuit comprising a Millers integrater including an amplifier, a capacitor connected in parallel with said amplifier, and a resistor having one terminal connected to the input side of said amplifier; a source of constant current connected to the other terminal of said resistor; means for maintaining at a constant value the reference potential at the output terminal of said integrator in the absence of an input signal and for providing a ramp voltage at the output terminal of said integrator in the presence of said input signal; said means including a three terminal switching element with a terminal connected to said output terminal and to the sourceof said input signal, with another terminal connected to said constant current source and with the remaining terminal connected to a source of reference potential said switching element being responsive to the absence of an input signal to pass a constant current from said constant current source, through said switching element to said input signal source to provide a constant voltage at said output terminal, said switching transistor being responsive to an input signal to cause a current to flow to said capacitor to produce a ramp voltage.

2. The ramp voltage wave generating circuit according toclaim 1 wherein said three terminal switching element is a transistor.

3. The ramp voltage wave generating circuit according to claim 2 wherein the emitter electrode of said transistor is connected to said output terminal via a Zener diode and a diode and also to said source of input signal and the collector electrode of said transistor is connected to said source of constant current and also to said input terminal of said amplifier via another diode. 

1. A ramp voltage wave generating circuit comprising a Miller''s integrater including an amplifier, a capacitor connected in parallel with said amplifier, and a resistor having one terminal connected to the input side of said amplifier; a source of constant current connected to the other terminal of said resistor; means for maintaining at a constant value the reference potential at the output terminal of said integrator in the absence of an input signal and for providing a ramp voltage at the output terminal of said integrator in the presence of said input signal; said means including a three terminal switching element with a terminal connected to said output terminal and to the source of said input signal, with another terminal connected to said constant current source and with the remaining terminal connected to a source of reference potential , said switching element being responsive to the absence of an input signal to pass a constant current from said constant current source, through said switching element to said input signal source to provide a constant voltage at said output terminal, said switching transistor being responsive to an input signal to cause a current to flow to said capacitor to produce a ramp voltage.
 2. The ramp voltage wave generating circuit according to claim 1 wherein said three terminal switching element is a transistor.
 3. The ramp voltage wave generating circuit according to claim 2 wherein the emitter electrode of said transistor is connected to said output terminal via a Zener diode and a diode and also to said source of input signal and the collector electrode of said transistor is connected to said source of constant current and also to said input terminal of said amplifier via another diode. 